{"id":52949,"date":"2024-11-13T11:17:21","date_gmt":"2024-11-13T08:17:21","guid":{"rendered":"https:\/\/saudishopper.com.sa\/en\/?p=52949"},"modified":"2026-03-28T06:58:51","modified_gmt":"2026-03-28T03:58:51","slug":"amd-announces-versal-premium-series-gen-2","status":"publish","type":"post","link":"https:\/\/saudishopper.com.sa\/en\/amd-announces-versal-premium-series-gen-2\/","title":{"rendered":"AMD Announces Versal Premium Series Gen 2"},"content":{"rendered":"\n<h2 class=\"wp-block-heading has-text-align-center\">Enabling New Levels of System Acceleration to Meet the Demands of Data-Intensive Workloads<\/h2>\n\n\n\n<ul class=\"wp-block-list\">\n<li><em>Extends Versal Gen 2 portfolio with the industry&#8217;s first FPGA devices\u00a0featuring CXL 3.1 and PCIe Gen6, with LPDDR5X support,\u00a0for fast connectivity, more efficient data movement, and unlocking\u00a0more memory\u00a0\u2014<\/em><\/li>\n<\/ul>\n\n\n\n<p class=\"wp-block-paragraph\"><strong>SANTA CLARA, Calif., &#8212; November 13, 2024\u00a0<\/strong>&#8212;\u00a0<a href=\"http:\/\/www.amd.com\/\">AMD<\/a>\u00a0(NASDAQ: AMD) yesterday announced\u00a0the\u00a0<a href=\"https:\/\/ttps\/www.amd.com\/en\/products\/adaptive-socs-and-fpgas\/versal\/gen2\/prime-series.html\">AMD Versal\u2122 Premium Series Gen 2<\/a>,\u00a0an adaptive SoC platform designed to deliver the highest levels of system acceleration for a wide range of workloads.\u00a0Versal Premium Series Gen 2\u00a0will be the FPGA industry\u2019s first devices featuring\u00a0Compute Express Link (CXL\u00ae)\u00a03.1 and PCIe\u00ae Gen6 as well as LPDDR5X memory support in hard IP.<sup>1\u00a0<\/sup><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">These next-generation interface and memory technologies access and\u00a0move data rapidly and efficiently between processors and accelerators. CXL 3.1 and LPDDR5X help unlock more memory resources faster to address the growing real-time processing and storage demands of data-intensive applications in data centers, communications, test and measurement, and aerospace and defense markets.\u00a0\u00a0<\/p>\n\n\n\n<blockquote class=\"wp-block-quote is-layout-flow wp-block-quote-is-layout-flow\">\n<p class=\"wp-block-paragraph\">\u201cSystem architects are constantly looking to pack more data into smaller spaces and move data more efficiently between parts of the system,\u201d said Salil Raje, senior vice president and general manager of Adaptive and Embedded Computing Group, AMD. \u201cOur latest addition to the Versal Gen 2 portfolio helps customers improve overall system throughput and utilization of memory resources to achieve the highest performance and unlock insights for their most demanding applications from the cloud to the edge.\u201d\u00a0<\/p>\n<\/blockquote>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>Accelerate Host Connectivity&nbsp;<\/strong><\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">AMD champions open innovation by supporting CXL, an open industry-standard interconnect between processors and devices such as FPGA-based accelerators.\u00a0With support for CXL 3.1 and PCIe Gen6, the industry\u2019s fastest host interfaces,2\u00a0Versal Premium Gen 2 devices enable industry-leading, high-bandwidth host CPU-to-accelerator connectivity. PCIe Gen6 offers a 2-4X faster line rate compared to competing FPGAs with PCIe Gen4 or Gen5 support,2while CXL 3.1 running PCIe Gen6 provides double the bandwidth of competing devices with CXL 2.13\u00a0at similar latencies, as well as enhanced fabric and coherency-capabilities.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Additionally, by pairing Versal Premium Series Gen 2 with AMD EPYC\u2122 CPUs, system architects can leverage the latest AMD FPGA-based device connected via CXL or PCIe to a high-performance CPU to accelerate data-intensive applications and meet rapid data growth demands. CXL also brings the additional benefit of memory coherency to help enable true heterogeneous, accelerated computing.\u00a0<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>Increasing Memory Bandwidth and Utilization<\/strong><\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">AMD Versal Premium Series Gen 2 adaptive SoCs accelerate memory bandwidth for faster data transfers and real-time responsiveness&nbsp;with the fastest LPDDR5X memory connectivity available, at up to 8533 Mb\/s. This ultra-fast, enhanced DDR memory enables up to 2.7X faster host connectivity over comparable competitive devices with LPDDR4\/5 memory.<sup>4<\/sup><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Connectivity to CXL memory expansion modules enables up to 2.7X more total bandwidth than LPDDR5X memory alone.<sup>5<\/sup>\u00a0As a result, the\u00a0Versal Premium Series Gen 2\u00a0allows for scalable memory pooling and extension for multiple accelerators, optimizing memory utilization and increasing bandwidth and capacity.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">By dynamically allocating a memory pool<strong>\u00a0<\/strong>for multiple devices, Versal Premium Series Gen 2 adaptive SoCs are designed to improve memory utilization in a Multi-Headed Single Logic Device (MH-SLD), allowing it to operate without a fabric or switch while supporting up to two CXL hosts.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>Strengthen Data Security&nbsp;<\/strong><\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">Enhanced security features help the Versal Premium Series Gen 2 transfer data quickly and securely in transit and at rest. It is the industry\u2019s first FPGA device to feature support for integrated PCIe\u00ae Integrity and Data Encryption (IDE) in hard IP.<sup>6<\/sup>\u00a0Inline encryption built into hard DDR memory controllers helps secure data at rest, while 400G High-Speed Crypto Engines help the device secure user data at up to 2X faster line rates, enabling faster secure data transactions.<sup>7<\/sup><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">AMD Versal Premium Series Gen 2 development tools are expected to be available in Q2 2025, followed by silicon samples by early 2026. Production shipments are expected to begin in the second half of 2026.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Enabling New Levels of System Acceleration to Meet the Demands of Data-Intensive Workloads SANTA CLARA, Calif., &#8212; November 13, 2024\u00a0&#8212;\u00a0AMD\u00a0(NASDAQ: AMD) yesterday announced\u00a0the\u00a0AMD Versal\u2122 Premium Series Gen 2,\u00a0an adaptive SoC platform designed to deliver the highest levels of system acceleration for a wide range of workloads.\u00a0Versal Premium Series Gen 2\u00a0will be the FPGA industry\u2019s first [&hellip;]<\/p>\n","protected":false},"author":8,"featured_media":52950,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_yoast_wpseo_meta-robots-noindex":"","_et_pb_use_builder":"off","_et_pb_old_content":"","_et_gb_content_width":"","_pr_autopilot_social_copy":"","_yoast_wpseo_opengraph_title":"","_yoast_wpseo_opengraph_description":"","_yoast_wpseo_opengraph_image":"","_yoast_wpseo_opengraph_image_id":0,"_yoast_wpseo_twitter_title":"","_yoast_wpseo_twitter_description":"","_yoast_wpseo_twitter_image":"","_yoast_wpseo_twitter_image_id":0,"_yoast_wpseo_primary_category":19,"_extra_hide_author_box":"","_extra_featured_post":"","_partner_post_id":0,"footnotes":""},"categories":[446],"tags":[],"class_list":["post-52949","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-computers","et-has-post-format-content","et_post_format-et-post-format-standard"],"yoast_head":"<!-- This site is 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